item condition standard input voltage rated 5.0 vdc tolerance continuous operation 4.5 vdc - 7.0 vdc starting condition (discharge starting voltage) 4.5 vdc - 7.0 vdc max. input current v in = 4.5 vdc 1.3 a luminance @ max. input leak current v in = 7.0 vdc control terminal = h(v in ) 4.0 ? (lamp off) on/off max. rush current v in = 7.0 vdc 6.5 a zero-p /50 ? luminance @ max. max. input power v in = 4.5 vdc 5.85 w luminance @ max. on/off control terminal control terminal i low = 2.0 ma input current l = 0.0 - 0.4 vdc (lamp lighting) v in = 7.0 vdc control terminal h = open or v in (lamp off) *above specifications occur @ 25 5?. item condition standard min typ max output voltage (vrms) v in = 4.5 vdc 1500 tube current (marms) luminance @ max. 5.5 6.0 6.5 luminance @ min. 2.5 max. power output (w) v in = 5.0 vdc/luminance @ max. 4.0 ignition frequency (khz) luminance @ max. 45 dc/dc converter frequency (khz) luminance @ max. 80 *above specifications occur @ 25 5? & v in = 4.5 - 7.0 vdc. input specifications* 5 volt input industrial grade single tube ccft inverter brightness control output specifications* physical specifications dimensions: 22.7mm x 96.5mm x 7.3mm (0.894" x 3.79" x 0.287") weight: 18g (0.634 oz.) operating temp: 0 to 55? relative humidity: 20% to 90%, non-condensing storage: -20 to 85?/5-95% rh impact resistance: 50g half wave per 2 msec vibration resistance: 10-55-10 hz/min @ 1.5mm t t a a i i y y o o y y u u d d e e n n sipf150-rh model lcd backlight driver rohs compliant
sipf150-rh model luminance variance item condition applied voltage output current luminance @ max. btwn. pin 5 & pin 6 0.0 vdc 6.0 ma luminance @ min. btwn. pin 5 & pin 6 4.5 vdc 2.5 ma 2.7 min. (2) 2?d.3 7 5 + 0.1 0.05 0.05 1 0.15 1 0.05 0.7 + 0.1 0.05 input 22.7 0.3 (11.5) 1pin +1.0 (14.0) 67.5 0.3 (15.0) 2 3.5 2 7.5 1pin (1.2) output 7.3 max 1.0typ (4.0) (4.0) (8. 2) 14.7 0.3 96.5 0.5 no component and no pattern on both sides lot symbol ?0 fm 32227 ? copyright 2007 taiyo yuden (u.s.a.), inc. specifications subject to change without notice. taiyo yuden (u.s.a.), inc. 440 stevens avenue, suite 300 solana beach, ca 92075 (858) 350-6800 / fax: (858) 350-6854 (800) 263-4532 www.t-yuden.com inverters@t-yuden.com
sipf150-rh model tech notes connection diagram cn1 molex 52207-0685 cn2 jst sm02(8.0)b-bhs-1-tb(lf) corresponding housing: jst bhr-03vs-1 SIPF-150-RH output current optimization method maximum output current can be adjusted by applying bias voltage between brightness control pins as shown below. brightness control dc bias (0-4.5 vdc) 3 2 v(in) 1 v(in) 4 5 on/off 6 gnd gnd brightness dc bias output voltage current luminance max. 0 vdc 6.0 ma luminance min. 4.5 vdc 2.5 ma the on/off control is achieved by using the on/off pin on the input side of sipf150. the circuit for the remote on/off circuitry consists of an active low ttl switch. when the circuit is open, the ic vcc is cut off. when the circuit is closed, ic vcc is activated. a mechanical switch or a ttl/cmos gate needs to be placed between the remote on/off pin and ground creating a condition where the circuit is closed to activate the inverter. either one of the following will be required for the inverter to operate: one recommended use of logic switch for remote on/off is shown in the diagram below. electrical specification for on/off terminal is low 0 to 0.4v, -0.4 ma or higher when switch is closed. on/off control v(in) on/off pin to ic vcc 0v inverter off 5v inverter on v(in) on/off pin to ic vcc sw (external) 1. tie on/off pin to ground. 2. add mechanical switch between on/off pin and ground, close switch. 3. add ttl/cmos switch between on/off and ground. circuit must be closed for unit to operate (as shown above right).
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